Categories: Wire Stories

VeriSilicon Unveils VC9000D_LCEVC: A High-Efficiency LCEVC Video Decoder Supporting 8K Ultra HD

Low-power and compact design enables easy integration into advanced multimedia SoCs


SHANGHAI–(BUSINESS WIRE)–#8K–VeriSilicon (688521.SH) today announced the launch of the VC9000D_LCEVC, a next-generation Low Complexity Enhancement Video Coding (LCEVC) video decoding IP. Designed for high-performance and energy-efficient video processing, VC9000D_LCEVC is used in conjunction with VeriSilicon’s VC9000D base video decoder to deliver up to 8K Ultra HD decoding, making it ideal for advanced multimedia applications such as smart TVs, set-top boxes (STBs), and mobile devices.

LCEVC, also known as MPEG-5 Part 2, is the latest standard by the Moving Picture Experts Group (MPEG) and the International Organization for Standardization (ISO). It specifies an enhancement layer which, when combined with a base video encoded with a separate codec, produces an enhanced video stream. The enhancement stream provides new features such as extending the compression capability of the base codec, lowering encoding and decoding complexity, and providing a platform for additional future enhancements. The VC9000D_LCEVC decoder is fully compliant with ISO/IEC 23094-2 (LCEVC) Main Profile, supporting up to Level 4.1. It processes 8/10-bit depth data, accommodates resolutions up to 8192×8192, and employs a frame-by-frame decoding architecture. In addition, it incorporates robust error detection to ensure reliable video playback.

With its high-performance hardware architecture and complete subsystem, VC9000D_LCEVC delivers superior video quality with minimal load on the host CPU. Its integrated Temporal Reference Frame Compression (TRFC) technology significantly reduces system bandwidth usage, while multi-level hierarchical clock gating minimizes dynamic power consumption. It also integrates a post-processor for flexible output format conversion.

Delivered as a technology-independent, fully synthesizable Register Transfer Level (RTL) package, the VC9000D_LCEVC supports various process nodes and standard cell libraries, ensuring smooth integration into diverse System-on-Chip (SoC) designs. This flexibility enables customers to efficiently deploy LCEVC decoding capabilities, accelerating time-to-market for next-generation video processing solutions.

“With the rapid growth of 8K content, AI-driven video applications, and the increasing demand for high-quality streaming and immersive experiences, the need for efficient, scalable video solutions is more critical than ever,” said Weijin Dai, Chief Strategy Officer, Executive Vice President, and General Manager of the IP Division at VeriSilicon. “By enabling seamless integration of LCEVC enhancement decoding into SoCs alongside our VC9000D base decoder, we help customers reduce bitrate and optimize bandwidth and storage costs, while providing a highly efficient path to support next-generation multimedia applications.”

VeriSilicon’s VC9000D_LCEVC video decoding IP is now available for licensing. For more information or collaboration inquiries, please visit www.verisilicon.com/en/ContactUs.

About VeriSilicon

VeriSilicon is committed to providing customers with platform-based, all-around, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. For more information, please visit: www.verisilicon.com

Contacts

Media Contact: press@verisilicon.com

Alex

Alex is a writer and digital content enthusiast who enjoys covering technology, current trends, useful tips, and topics that matter to everyday readers. With a focus on clear, informative, and easy-to-understand content, Alex aims to provide readers with practical insights and interesting perspectives across a wide range of subjects.

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